Efficient Realization of a Threshold Voter for Self-Purging Redundancy

The self-purging technique is not commonly used mainly due to the lack of practical implementations of its key component, the threshold voter. A very efficient implementation of this voter is presented which uses a decomposition technique to substantially reduce the circuit complexity and delay, as compared to alternative implementations. Introduction Achieving ultrareliable systems is a goal of increasing importance in many areas. The selfpurging hybrid approach [1] allows us to improve the reliability of digital systems and it has very simple switching mechanisms, a straighforward design and is simpler, cheaper and more reliable than other hybrid approaches. Also, the faulty modules can be replaced from the system without affecting the normal operation of the system. This characteristic of self-purging systems is extremely attractive because it eases maintenance and repair. In the self-purging approach each of the N identical modules has the capability to disconnect itself from the system in the event that its output disagrees with the voted output of the system. Switches remove their associated module from the system in case the module fails. The voter provides the mean for the masking of any fault that occurs in the module outputs. The voting is done by means of a threshold gate. The choice of the voter threshold is critical for the tolerance of selfpurging systems to multiple faults. In general, the best voter threshold is equal to half the number of the remaining fault-free modules [1]. In spite of the advantages described, the self purging technique is not commonly used in fault-tolerant digital designs. One reason for this limited utilization is that it is difficult to construct a threshold gate because it is claimed as an analog element, which is not practical for digital use. Concerning digital implementations, a direct implementation of the voter can be very expensive in terms of the number of gates [2]. Therefore, some simplifying solutions have been reported. Razavi [3] substitutes the threshold gate with a digitally constructed “strong majority voter” which automatically adjusts its threshold. However, the system presented is of limited use because only single module failures per clock cycle are allowed. A solution which can tolerate multiple module failures at any time is presented in [4], but no solution to build the voter is presented. In this paper a very efficient decomposition technique for the logic function performed by the voter is developed, allowing an extremely compact realization. The Losq Voter The voter that produces the system output and provides fault masking is a threshold gate. A threshold gate (TG) has n two-valued inputs x1, x2, ..., xn and a single two-valued output, y. It is defined by n+1 real numbers: threshold T and weights w1, w2, ..., wn, being denoted as ,where weight wi is associated with variable xi. The input-output relation of a TG is defined as y=1 iff and y=0 otherwise. Sum and product in the previous definition are the conventional operations, instead of logical ones. The classical solution to the automatic threshold adjustment uses a simple mechanism as shown in Figure 1 [1]. The threshold voter is described as , and it has been represented by a non-standard but widely used symbol. Implementing the Losq voter is a difficult task because the large number of inputs it exhibits. As weights for xi are 1 and weights for yi are 2, the total weight for the gate is 3N. The most economical solutions for implementing this kind of voters are based on sorting networks [2]. Thus, the Losq voter would require a 3N-input SN to be implemented. Proposed Voter Implementation In this section, an efficient and extremely compact decomposition technique for the logic function performed by the voter is developed. w1 w2 ... wn T ; , , , [ ] wixi T ≥ i 1 = n ∑ 1 2 1 2 ... 1 2 N ; , , , , , , [ ] Theorem 1: The output of the voter from a self-purging scheme with N replicated modules can be obtained from a two-level network composed by two N-input SNs, and a combinational network L, with inputs, as shown in Figure 2a. The first SN depends on yi variables (i=1, ..., N), and the second one depends on xi variables (i=1, ..., N). Proof: Let us consider the Losq voter for N modules given by , i.e. the voter output is asserted if . Let us divide the input set into two disjoint subsets, , and . Let and be two quantities which will be very useful in the following. Input combinations which assert voter output L are: {(a or more variables in S1 are at logic 1) or (a-1 or more variables in S1 at logic 1) and (b or more variables in S2 at logic 1) or (a-2 or more variables in S1 at logic 1) and (b+2 or more variables in S2 at logic 1) or .............................................................................. (1 or more variables in S1 at logic 1) and (N-2 or more variables in S2 at logic 1) or (N variables in S2 at logic 1)} This formulation yields the logic expression for the voter output: (1) where stands for a function which asserts when at least r variables in S1 are 1, and has a similar definition but referred to S2. But this definition is exactly that corresponding to an N-input threshold function (inputs from S1 or S2) with all the N weights equal to 1 and threshold in r. There are of such TGs, of them depending on variables xi and another depending on variables yi. The fan-in of all of them is N, as shown in Figure 2b. The solution given in Figure 2a is obtained when the conceptual link between threshold gates and SNs [5] is applied. An n-input SN is a switching network with n outputs which are a sorted (non-increasing order) permutation of the inputs. The set of outputs in an n-input SN are n TGs corresponding to , where if , , and 0 2 N 2 ---1 2 ... 1 2 N ; , , , , [ ] xi 2 yi + ( ) N ≥ i 1 = N ∑ x1 y1 ... xN yN , , , , { } S1 y1 ... yN , , { } = S2 x1 ... xN , , { } = a N 2 ---= b 2 N 2 ---N 2 ---– + = f L TY a N TY a 1 – N TX b N ⋅ TY a 2 – N TX b 2 + N ⋅ ... TY 1 N TX N 2 – N ⋅ TX N N + + + + + = TY r N TX r N